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Can you determine the cache line size of the machine from the FCode, to write into the cache-line-size configuration space register of my PCI device?

cache configuration determine fcode line Machine size write
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Can you determine the cache line size of the machine from the FCode, to write into the cache-line-size configuration space register of my PCI device?

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The cache-line-size register in configuration space refers to the cache line size supported by the PCI device. 12.

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