Can I use the CDCM1804 to level translate between single-ended or differential signaling and still provide differential LVPECL and CMOS outputs?
Related Questions
- Can I use the CDCM1804 to level translate between single-ended or differential signaling and still provide differential LVPECL and CMOS outputs?
- Does MSCS prefer one type of SCSI signaling over the other (or, differential versus single-ended)?
- What is the fan-out capability of the CMOS, LVDS, and LVPECL outputs?