can I really just leave M1,M2,M3 pins floating?
ML402: 121682: 07/07/11: MiG : Memory Interface (DDR SDRAM) as an ISE schematic symbol 121690: 07/07/11: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic 121692: 07/07/11: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic 121746: 07/07/12: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic 121751: 07/07/12: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic 121844: 07/07/13: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic 121850: 07/07/13: Re: MiG : Memory Interface (DDR SDRAM) as an ISE schematic Mladen Veselic: 28537: 01/01/16: Oscillator for FPGA – low cost
