Anyone use XChecker cable with 3.3V Xilinx parts?
13282: 98/11/23: Re: Synthesizeablel fifo 13300: 98/11/24: Re: Integer divide algorithms 13315: 98/11/25: Re: Add-in board with FPGA Secondary Processor 13688: 98/12/18: Re: Xilinx Foundation vs. Altera Max Plus II 13367: 98/11/30: Re: PCB rules for Xilinx ICs 13368: 98/11/30: Re: Xilinx 5.2/6 tools v M1.5 tools for an XC4013E part….. 13492: 98/12/05: Re: A short digression… 13499: 98/12/06: Re: A short digression… 13510: 98/12/07: Re: A short digression… 13583: 98/12/10: Re: A short digression… 13601: 98/12/11: Re: HELP, Tool selection 13449: 98/12/03: Re: Minimum clock freq reqd 13447: 98/12/03: Re: Xilinx FPGA configuration problems… Help! 13473: 98/12/04: Re: package/footprint/layout 13517: 98/12/07: Re: New FPGA Brd: FPGA+PowerPC+Ethernet+TCP/IP 13518: 98/12/07: Re: computer requirements for CAE systems 13547: 98/12/08: Re: What are the ‘rules’ for assigning large buses to fpga’s 13602: 98/12/11: Re: Need basic info on FPGA!