What is a deskew (DS) PLL?
A DS PLL, like a clock generator PLL, can produce an output clock which is phase-locked to the reference clock. However, unlike with clock generator PLLs, the feedback clock of the deskew PLL comes from somewhere along the clock distribution network of the chip (in clock generator PLLs, the feedback clock is internally provided within the PLL). DS PLLs are typically used to produce clocks to support off-chip IO interfaces. TCI provides silicon-proven DS PLLs with low jitter, low power, and low static phase offsets.
